Interface & Connectivity IP

MIPI IP

MIPI camera, display, and related interface IP. A receiver does not stand in for a transmitter, and the PHY is a separate listing unless the source combines them.

Showing 1–12 of 12 solutions.

Arasan MIPI CSI-2 v2.1 Receiver IP
MIPI IP
Arasan MIPI CSI-2 v2.1 Receiver IP is licensable camera receiver controller IP. It is the CSI-2 v2.1 receiver offering. The CSI-2 transmitter and the analog PHY are separate products on Arasan’s MIPI pages.
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Arasan MIPI D-PHY 1.2 Analog Transceiver IP
MIPI IP
Arasan MIPI D-PHY 1.2 Analog Transceiver IP is licensable PHY IP. The page says it can be configured as a transmitter, receiver, or transceiver, with high-speed operation up to 2.5 Gb/s per lane with deskew calibration. CSI-2 and DSI controllers are separate products.
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Cadence MIPI CSI-2 RX Controller IP
MIPI IP
Licensable design IP. CSI-2 v2.1 receiver controller that unpacks incoming camera streams.
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Cadence MIPI D-PHY IP
MIPI IP
Licensable design IP. MIPI D-PHY with documented TX-only, RX-only, and combined configurations.
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Curious Camera PHY Interface IP (MIPI D-PHY / CSI-2)
MIPI IP
Curious Camera PHY Interface IP is licensable camera physical-layer and link soft-macro IP. The official English interface page lists MIPI D-PHY (and related camera PHYs) with foundry/node supply tables and separate CSI-2 link soft macros.
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Innosilicon MIPI M-PHY v4.1 IP
MIPI IP
Innosilicon MIPI M-PHY v4.1 IP is licensable physical-layer IP. The official product page states compliance with MIPI M-PHY protocol V4.1 and describes a drop-in PHY with built-in I/O and ESD. Controllers and C/D-PHY combo offerings are separate pages.
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M31 MIPI C-PHY/D-PHY Combo
MIPI IP
M31 MIPI C-PHY/D-PHY Combo is licensable PHY IP. The official page describes a configurable C-PHY or D-PHY physical layer with a PPI interface for CSI-2 and DSI controllers. MIPI CSI-2/DSI-2 controllers are separate M31 products.
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MAXVY MIPI CSI-2 v3 Transmitter IP
MIPI IP
MAXVY MIPI CSI-2 Transmitter IP-V3 is licensable camera-serial-interface transmitter design IP. The product page states compliance with MIPI CSI-2 version 3.0 and lists Verilog source deliverables.
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Mixel MIPI D-PHY (MXL-DPHY)
MIPI IP
Mixel MIPI D-PHY (MXL-DPHY) is licensable PHY IP. The official page describes a physical layer compliant with MIPI D-PHY, delivered as soft digital CIL plus hard mixed-signal views. CSI-2/DSI controllers are separate from this PHY listing.
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Synopsys MIPI CSI-2 Controller IP
MIPI IP
Synopsys MIPI CSI-2 Controller IP is DesignWare controller IP for the link between an image processor and a CSI-2 image sensor. It is licensable controller IP, not a camera chip and not the C-PHY or D-PHY.
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Synopsys MIPI DSI/DSI-2 Host Controller IP
MIPI IP
Synopsys MIPI DSI/DSI-2 Host Controller IP is the display-output host role. The PHY, including C-PHY or D-PHY, is separate. This listing is not a MIPI CSI-2 camera receiver, not a GPU, and not a PHY-only block.
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T2M MIPI DSI Transmitter v1.2 Controller IP Core
MIPI IP
T2M MIPI DSI Tx v1.2 Controller IP is licensable display-serial-interface controller soft IP. The official product page states compliance with MIPI DSI specification v1.2 and lists configurable RTL deliverables.
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