
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The product page also describes a device role and mentions CSI-2 in a related interoperability sentence.
Synopsys MIPI DSI/DSI-2 Host Controller IP is the display-output host role. This listing is not a MIPI CSI-2 camera receiver, not a GPU, and not a PHY-only block.
This record keeps the host display-output role only.
Finder function
Display host
Configuration checks
Confirm C-PHY or D-PHY pairing. Do not substitute a CSI-2 receiver or a GPU for this display host.
Recorded aliases
mipi dsi; dsi-2 host; display interface controller; mipi display output
Licensable design IP. CSI-2 v2.1 receiver controller that unpacks incoming camera streams.
View solutionT2M MIPI DSI Tx v1.2 Controller IP is licensable display-serial-interface controller soft IP. The official product page states compliance with MIPI DSI specification v1.2 and lists configurable RTL deliverables.
View solutionArasan MIPI CSI-2 v2.1 Receiver IP is licensable camera receiver controller IP. It is the CSI-2 v2.1 receiver offering. The CSI-2 transmitter and the analog PHY are separate products on Arasan’s MIPI pages.
View solutionArasan MIPI D-PHY 1.2 Analog Transceiver IP is licensable PHY IP. The page says it can be configured as a transmitter, receiver, or transceiver, with high-speed operation up to 2.5 Gb/s per lane with deskew calibration. CSI-2 and DSI controllers are separate products.
View solutionLicensable design IP. MIPI D-PHY with documented TX-only, RX-only, and combined configurations.
View solution
