Silicon Showcase⁠™

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Packaging and chiplets

2.5D/3D integration, advanced packaging, substrates and interposers.

Showing 13–22 of 22 solutions.

Provider

  • LITHOBOLT G2ASMPT logo

    Packaging and chiplets

    ASMPT LITHOBOLT G2 is a die-to-wafer hybrid-bonding system for direct and collective bonding.

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  • MosChip Silicon Engineering ServicesMosChip Technologies Limited logo

    Design Services

    Silicon engineering services. Physical design and sign-off are documented on the design-services page. Package, assembly, ATE test, and qualification are documented on the turnkey page as coordination with foundry and OSAT partners.

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  • TSMC 3DFabricTSMC logo

    Packaging

    TSMC umbrella family of 3D silicon stacking and advanced packaging. CoWoS, TSMC-SoIC and InFO are constituent platforms listed separately.

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  • TSMC InFO Advanced PackagingTSMC logo

    Packaging

    TSMC InFO is a wafer-level integrated fan-out packaging platform using high-density redistribution layers for mobile, network and high-performance computing integration.

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  • TSMC SoIC 3D IntegrationTSMC logo

    Packaging

    TSMC-SoIC is a wafer-level frontend 3D chip-stacking platform for homogeneous and heterogeneous chiplets, distinct from CoWoS 2.5D packaging and InFO fan-out.

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  • Universal-H300Hwatsing Technology logo

    Packaging and chiplets

    Hwatsing Universal-H300 is a 300 mm chemical-mechanical polishing tool for integrated circuits, advanced packaging and silicon wafers.

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  • VIPackASE Technology Holding logo

    Packaging

    ASE VIPack is ASE’s heterogeneous-integration packaging platform for high-density chiplet and advanced-package construction.

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  • imec IC-link ASIC developmentimec logo

    Design Services

    ASIC services through imec IC-link, including package design, assembly through partner assembly houses, and test and qualification through partner test houses. Physical design and timing signoff are not named on the reviewed pages.

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