AMD 3D V-Cache

Official AMD product-brief materials describe copper-to-copper hybrid bonding and through-silicon vias, presenting the approach as the first x86 true 3D die stack with far higher interconnect density than 2D chiplets or solder-bump 3D stacks. This listing records cache-on-logic hybrid bonding rather than X3D product names as extra rows. Infinity Fabric, listed separately, is the lateral chiplet fabric. Intel Foveros and TSMC SoIC, already in the catalog, are other 3D stacking platforms. Density and cache-size figures should be confirmed on AMD’s current 3D V-Cache documentation.