Save a solution from IP Finder, a solution listing, a solution page, or a provider’s solutions to compare it here.
Saved in this browser. Information is based on published sources. Confirm suitability and configuration with the provider.
United States
Semiconductor company that publishes chiplet CPU architectures and 3D cache stacking, including Infinity Fabric and 3D V-Cache.
2 published solutions.
3D V-Cache stacks an L3 cache tile on a CPU core-complex die using copper-to-copper hybrid bonding and TSVs. Official AMD materials call it the first x86 true 3D die stack, with much higher interconnect density versus 2D chiplets.
Infinity Fabric is AMD’s coherent on-package and multi-die interconnect, linking CPU core-complex dies to a central I/O die and, in multi-socket systems, across packages. Official EPYC architecture documents describe CCD–IOD GMI links and xGMI.