Arm Neoverse CMN S3
NoC IPLicensable Arm Neoverse CMN S3 coherent interconnect IP. The page documents AMBA 5 CHI and multichip support. A UCIe PHY is not included.
View solutionSecurity IP and the interconnects that move traffic on a die or between dies. A NoC stays on one die; a die-to-die link does not replace it.
Licensable Arm Neoverse CMN S3 coherent interconnect IP. The page documents AMBA 5 CHI and multichip support. A UCIe PHY is not included.
View solutionNon-coherent network-on-chip IP for cost-efficient, low-power IoT and microcontroller SoCs.
View solutionLicensable cache-coherent NoC IP. The page documents AMBA CHI and ACE. A Multi-Die option requires a separate die-to-die controller and PHY. A UCIe PHY is not included.
View solutionBaya Systems WeaveIP is chiplet-ready Network-on-Chip fabric IP for SoC and multi-chiplet systems. The official site describes a protocol-agnostic unified transport for coherent, non-coherent, and switch-fabric traffic paired with WeaverPro modeling software.
View solutionLicensable design IP. AES engine for 128-bit blocks and 128-, 192-, or 256-bit keys.
View solutionCrypto Quantique QDID PUF is licensable CMOS PUF IP for hardware root-of-trust and device identity. The official page states generation of unique identities from quantum tunnelling variations in standard CMOS.
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EnSilica Silicon IP is a licensable portfolio including eSi-Crypto cryptographic accelerators and eSi-ADAS radar processing IP. Official home and Silicon IP pages state silicon-proven blocks with a subset available for external licensing.
View solutionNewly introduced Arteris FlexGen Multi-Die NoC IP extends non-coherent network-on-chip connectivity across die-to-die links. The expanded multi-die solution is available to early access partners and strategic customers.
View solutionArteris FlexNoC is on-chip network IP, not a packaged interconnect chip and not a coherent cache controller.
View solutionFortifyIQ FortiAES is a family of licensable synthesizable AES IP cores with side-channel and fault-injection resistance. The official catalog page lists hardware AES SKUs and soft-macro, foundry-agnostic delivery.
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IP Cores AES is licensable synthesizable AES (FIPS-197) cipher IP. The official product page states Rijndael encryption/decryption with ECB/CBC/CFB/OFB/CTR modes, 128/192/256-bit keys, and deliverables as Verilog/VHDL source or netlist.
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Noesis ntAES32 is licensable AES (FIPS-197) soft IP. The official product page states encrypt/decrypt of 128-bit blocks with 128/192/256-bit keys, discrete roundkey expansion, and deliverables as synthesizable HDL or FPGA netlist.
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