Memory & Subsystem IP
On-chip SRAM, register files, and embedded MTP, EEPROM, or flash macros. A macro is not a discrete memory chip, a DRAM device, or an HBM stack.
Attopsemi I-fuse is licensable OTP memory IP based on a non-explosive fuse programming mechanism. The official technology page states foundry-independent OTP without extra masks and physics-based electro-migration programming.
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Floadia LEE Flash G1 is licensable SONOS embedded Flash NVM IP for BCD processes. The official product page publishes automotive-grade specs, AEC-Q100 Grade 1 availability tables across TSMC/SMIC/GTA/SK Hynix/PSMC, and low mask-adder integration claims.
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Embedded flash technology for compatible chip processes and applications.
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eMemory NeoFuse is anti-fuse embedded OTP/PMTP silicon IP for logic process nodes, not a discrete memory product.
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RAAAM GCRAM is licensable CMOS-compatible embedded memory IP positioned as a drop-in SRAM alternative. The official site claims up to 50% area reduction and up to 3× power reduction versus SRAM with no extra process steps.
View solutionRangduru DX-MRAM is positioned as licensable ultra-high-density logic OTP / AI memory IP. The official site brands Rangduru as a global leader in ultra-high-density, low-cost LOGIC OTP non-volatile memory solutions using DX-MRAM technology.
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Weebit ReRAM is embedded resistive-RAM IP, not a discrete DRAM or NAND catalog.
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Xenergic HSLP SRAM is licensable on-chip SRAM IP. The official High-Speed Low-Power page states customer cases with up to 40% lower dynamic power and up to 55% lower leakage while maintaining speed and competitive area.
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YMC ymtp is licensable embedded non-volatile memory IP compatible with logic processes. The official site states leadership in multi-time-programmable embedded NVM IP licensed to foundries, IDMs, and fabless designers.
View solutioneMemory NeoEE is rewritable embedded EEPROM with up to 500000 program/erase cycles, low to medium density around 16 Kbits or less, and byte-write. The page states zero additional masking layers for this macro. That endurance and mask count do not transfer to NeoMTP or to NeoFlash.
View solutioneMemory NeoFlash is rewritable embedded flash. The listing says it needs 2 to 3 additional masks, on CMOS logic from about 180 nm to 22 nm, with over 100000 program/erase cycles. Density is per customer request. It is not a zero-mask embedded flash and it is not a discrete flash chip.
View solutioneMemory NeoMTP is rewritable single-poly embedded MTP. The listing states up to 1000 program/erase cycles and densities from about 16K to 512K bits. That endurance is not unlimited flash, not DRAM, and not one-time programmable storage.
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