Public source

Cadence PCIe Controller IP

The Cadence controller page reviewed on 2 November 2026 states compliance with PCIe 6.0, PCIe 5.0, PCIe 4.0, PCIe 3.1, PCIe 2.1, and PCIe 1.1, including the IDE and DOE ECNs named on that page.

Solution category: PCIe IP
Offering type: Product

View Official Source Find IP for your application

Overview

The controller is available as root-port, endpoint, or dual-mode, with multifurcation and SR-IOV described. The PHY is separate. Pricing, license terms, process support, and the exact configuration available for a design are not stated on the reviewed page and require confirmation from the provider.

Technical capabilities

Published as design IP
Licensable PCIe controller design IP.
Numbered specification
PCIe 6.0
Finder function
PCIe controller

Lifecycle and categories

Lifecycle stages: Interface and connectivity IP
Solution categories: PCIe IP
Supported versions: PCIe 6.0, PCIe 5.0, PCIe 4.0, PCIe 3.1, PCIe 2.1, PCIe 1.1
Compatibility: Pricing, licensing, and configuration availability require provider confirmation. Source

Official resources

Cadence PCIe Controller IP (opens in a new tab)

Insights

Physical AIPhysical AI: security and connectivity questions before selecting IPRead insight

Related solutions

Rambus PCIe 6.3 Controller

PCIe IP

Licensable PCIe controller IP. The page documents PCIe 6.3 with revisions 5.0, 4.0, and 3.1, a 64 GT/s transfer rate, and endpoint, root, switch, and dual-mode roles. A PHY is not included.

View solution

Silicon Interfaces PCIe 3.0 Controller IP

PCIe IP

Silicon Interfaces PCIe 3.0 Controller IP is a licensable synthesizable RTL PCI Express controller core. The official AssetsPCIe page states a fully synthesizable Verilog HDL core with UVM testbench and optional VIP add-ons.

View solution

Synopsys Controller IP for PCI Express 6.x

PCIe IP

Licensable controller IP for PCI Express. The page documents revisions 6.2, 6.1, 6.0.1, 5.0, 4.0, and 3.1, a 64 GT/s transfer rate, and endpoint, root, switch, and dual-mode roles. A PHY is not included.

View solution

XtremeSilica PCIe Gen4/5/6 Controller IP Portfolio

PCIe IP

XtremeSilica PCIe controller IP covers Gen4/5/6 offerings in its silicon IP portfolio. The official portfolio page states validated high-speed IP cores with Gen5 at 32 GT/s, Gen4 at 16 GT/s, and Gen6 at 64 GT/s PAM4, with AXI/AHB integration notes.

View solution

Qualitas PCIe Gen4 to Gen6 PHY IP

PCIe IP

Qualitas PCIe PHY IP is licensable hard PHY IP covering PCI Express Gen4 through Gen6. The official English site states PCIe PHY delivering up to 64 GT/s per lane alongside UCIe, SerDes, MIPI, USB, and Ethernet PHY lines.

View solution

Signature IP PCIe Gen 6.x / CXL 3.x / NoC IP

PCIe IP

Signature IP PCIe Gen 6.x, CXL 3.x, and NoC blocks are licensable interconnect soft IP. The official site states standalone licensing of PCIe/CXL/NoC verified RTL plus chiplet design services using the same blocks.

View solution