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XtremeSilica PCIe Gen4/5/6 Controller IP Portfolio

The Silicon IP Portfolio page reviewed on 12 November 2026 presents a suite of validated IP cores for AI, datacenter, automotive, and edge applications.

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Overview

XtremeSilica PCIe controller IP covers Gen4/5/6 offerings in its silicon IP portfolio. The official portfolio page states validated high-speed IP cores with Gen5 at 32 GT/s, Gen4 at 16 GT/s, and Gen6 at 64 GT/s PAM4, with AXI/AHB integration notes.

PCIe entries list PCIe Gen 5 (32 GT/s per lane, x1–x16, full AXI/AHB integration), PCIe Gen 4 (16 GT/s, x1–x16, low power), and PCIe Gen 6 (64 GT/s, PAM4, ultra-low latency). The same portfolio also lists CXL 3.0, UCIe, USB4/USB 3.2, Ethernet MAC/PCS rates to 800G, video codecs, and DDR/LPDDR/NVMe controllers as separate line items. This listing focuses on the PCIe Gen4/5/6 controller family as the candidate product. Deep per-SKU datasheet tables are linked as “View … specifications” actions on the page rather than fully inlined.

Technical capabilities

  • Published as design IP

    Licensable semiconductor IP. This listing is not a finished controller chip.

  • Controller IP

    Controller / protocol IP. A companion PHY is a separate listing unless the page states otherwise.

  • Finder function

    PCIe controller

  • Numbered specification: Gen6 (64 GT/s PAM4) as listed

    Gen6 (64 GT/s PAM4) as listed is named for this product on the reviewed page.

Lifecycle and categories

Solution categories
PCIe IP
Supported versions
PCIe Gen4 (16 GT/s); Gen5 (32 GT/s); Gen6 (64 GT/s PAM4) as listed
Compatibility
AXI/AHB integration noted for Gen5; FPGA/ASIC SoC use stated at portfolio level. Source

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