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Public source

Synopsys Ethernet PCS IP

Synopsys documents PCS IP between an Ethernet MAC and physical-medium attachment functions, for 1 Gb/s, 2.5 Gb/s, 5 Gb/s, and 10 Gb/s.

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Overview

Ethernet physical coding sublayer for 1 Gb/s, 2.5 Gb/s, 5 Gb/s, and 10 Gb/s.

Documented derivatives include SGMII, XAUI/RXAUI, and 10GBASE-R/KR options. This listing is the PCS, not the MAC and not an analog PHY. Silicon Showcase⁠™ reviewed the page on 2 November 2026. Pricing, license terms, process support, and the exact configuration available for a design are not stated on the reviewed page and require confirmation from the provider.

Technical capabilities

  • Published as design IP

    Licensable Ethernet PCS design IP.

  • Recorded aliases

    DWC_xpcs; dwc_xpcs

Lifecycle and categories

Solution categories
Ethernet IP
Compatibility
Pricing, licensing, and configuration availability require provider confirmation. Source

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