
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
CAST documents LLEMAC-1G at 10 Mb/s, 100 Mb/s, and 1 Gb/s.
The core is offered as RTL or an FPGA netlist. MII, GMII, and RGMII connect to an external PHY. Faster Ethernet line rates are not documented on the reviewed page. Silicon Showcase™ reviewed it on 2 November 2026. Pricing, license terms, process support, and the exact configuration available for a design are not stated on the reviewed page and require confirmation from the provider.
Published as design IP
Licensable Ethernet MAC design IP.
Controller IP
MAC with an external PHY connection.
Finder function
Ethernet MAC
Recorded aliases
LLEMAC-1G
Algo-Logic ULL 10GE MAC + PHY is licensable ultra-low-latency 10 Gigabit Ethernet MAC/PHY soft IP for FPGA platforms. The official product page and FPGA IP Cores portfolio list IEEE 802.3-oriented MAC features with Avalon-ST/AXI4-Stream interfaces.
View solutionAtomic Rules UDP Offload Engine is licensable UDP/IPv4 FPGA IP. The official page states RFC 768/791 hardware offload for 10–400 GbE line rates with Avalon and AXI4 interfaces.
View solutionLicensable design IP. Soft Ethernet controller for 10 Gb/s, 2.5 Gb/s, and 1 Gb/s, including MAC, PCS, and DMA functions.
View solutionChevin 10/25/40/100G MAC/PCS is licensable low-latency Ethernet MAC and PCS IP for FPGA/ASIC-oriented designs. The official page states IEEE 802.3by compliance and flexible licensing.
View solutionComcores Ethernet Controller is licensable ASIC-proven network interface IP. The official page states 10M–10GbE speeds with integrated DMA, timestamping, flexible host interfaces, and RTL deliverables.
View solutionCoreTSE is triple-speed Ethernet MAC IP for supported Microchip FPGAs. The page documents operation at 10 Mb/s, 100 Mb/s, and 1 Gb/s, which it also writes as 10/100/1000 Mbps. The PHY connects through G/MII or an SGMII ten-bit interface and stays a separate part. CoreTSE_AHB is a distinct AHB and DMA configuration. Both cores are included in the CoreTSE_AHB license, and this listing is only CoreTSE.
View solution
