Foundation & Analog IP
On-chip regulators, power switches, and related IP. Board-level power supplies are outside this category.
Agile Analog agileLDO is a linear low-dropout regulator, including capless and externally biased configurations. It is not a buck converter, a switching regulator, or a finished power-management IC. The process node and the load current need confirmation.
View solutionAgile Analog agilePOK monitors a supply against programmable upper and lower thresholds, with 16 trim steps on the reviewed page. Monitoring a supply does not regulate it and does not establish complete tamper prevention.
View solutionAgile Analog agilePOR is a power-on-reset circuit with programmable normal and low-power thresholds, delays, and hysteresis. It is not a voltage regulator.
View solutionAgile Analog agileREF is a bandgap voltage reference with configurable bias outputs. It is not a clock generator and it is not a load regulator.
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Cologne Chip C3-PLL-2 is licensable ASIC PLL IP. The official site lists ASIC IP Cores C3-PLL-2 and C3-CODEC-G712-4 alongside GateMate FPGA and telecom IC product lines.
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Dolphin Semiconductor power management IP is a licensable platform of LDO, DC/DC, SIMO, ABB, and voltage-monitor blocks. The official page states nano-power designs across process nodes and a per-project licensing model.
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Racyics ABX is licensable Adaptive Body Biasing platform IP for GlobalFoundries 22FDX. The official product page states ULV operation down to 0.4 V with ABB generator, standard cells, and SRAM IP, including automotive RBB leakage reduction claims.
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ShortLink mixed-signal Silicon IP is a licensable RF/analog IP portfolio. The official Silicon IP overview lists RF transceivers, SAR/Delta-sigma ADCs, and clock/DC-DC building blocks as standard and purpose-specific licensed IP.
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SiliconGate SGC75 is licensable low-dropout regulator IP for SoC integration. The official products page describes a capless ultra-fast-response LDO family with wide Vin/Vout ranges and 50–500 mA output options.
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TECHWIDU Mixed Signal IP is a licensable analog foundation IP portfolio. The official products page states Analog IP and layout services for 5/8/10/14 nm FinFET with generic blocks including POR, OSC, BGR, LDO, PLL, and I/O.
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Tetrivis RF/ADC/PLL IP is a licensable mixed-signal/RF IP portfolio. The official site states silicon-proven Tx/Rx RFICs, ADCs, CLK-PLLs, RF-PLLs, and DACs, including KuKa Ku/Ka-band mmWave ICs for LEOSAT.
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Weasic Frequency Synthesizer IP is licensable RF/analog IP. The official products navigation lists Frequency Synthesizers first among wireless transceivers, FEMs, sensors, ADCs, and analog building blocks for radar/5G/satellite.
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