
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The SiliconGate products page reviewed on 12 November 2026 states a portfolio of more than 800 power-management IPs spanning voltage/current references, advanced power controllers and POR monitors, LDOs, LED drivers, and battery chargers.
The official products page describes a capless ultra-fast-response LDO family with wide Vin/Vout ranges and 50–500 mA output options.
The SGC75 LDO is described as a low-dropout, high-current, fast-response, low-quiescent linear regulator IP for SoC integration with high PSR, soft start, over-current protection, and stability without an external output capacitor. Stated ranges include Vin 1.35–4.6 V, Vout 0.6–4.0 V, eight output current ranges from 50 mA to 500 mA, and TJ –40 °C to +125 °C with 4% overall accuracy targets. Confirm the exact revision, role, and deliverables on the current provider page before integration.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
Finder function
LDO / power management
Numbered specification: SGC75 family (and related SGC77 series on same page)
SGC75 family (and related SGC77 series on same page) is named for this product on the reviewed page.
Recorded aliases
SGC75; SiliconGate LDO
Agile Analog agileLDO is a linear low-dropout regulator, including capless and externally biased configurations. It is not a buck converter, a switching regulator, or a finished power-management IC. The process node and the load current need confirmation.
View solutionAgile Analog agilePOK monitors a supply against programmable upper and lower thresholds, with 16 trim steps on the reviewed page. Monitoring a supply does not regulate it and does not establish complete tamper prevention.
View solutionAgile Analog agilePOR is a power-on-reset circuit with programmable normal and low-power thresholds, delays, and hysteresis. It is not a voltage regulator.
View solutionAgile Analog agileREF is a bandgap voltage reference with configurable bias outputs. It is not a clock generator and it is not a load regulator.
View solutionCologne Chip C3-PLL-2 is licensable ASIC PLL IP. The official site lists ASIC IP Cores C3-PLL-2 and C3-CODEC-G712-4 alongside GateMate FPGA and telecom IC product lines.
View solutionDolphin Semiconductor power management IP is a licensable platform of LDO, DC/DC, SIMO, ABB, and voltage-monitor blocks. The official page states nano-power designs across process nodes and a per-project licensing model.
View solution
