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Dolphin Semiconductor Power Management IP (LDO / DC-DC)

The Power Management IP page reviewed on 12 November 2026 describes a portfolio of DC/DC converters, LDO regulators, and voltage monitors for active and always-on domains.

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Overview

Dolphin Semiconductor power management IP is a licensable platform of LDO, DC/DC, SIMO, ABB, and voltage-monitor blocks.

LDO variants named include general-purpose, low-quiescent (LQ), and capless (CL); DC/DC offerings include general-purpose and audio-grade converters; SIMO, adaptive body bias (ABB), and POR/BOR voltage monitors are also listed. Process coverage is stated from mature nodes down to 22 nm with a growing FinFET portfolio; FAQ states silicon-proven availability varies by block/datasheet. Licensing FAQ states per-project licenses with optional per-unit royalties, covering views, models, documentation, and integration support, with Application Lab pre-licence evaluation. Address 1bis A et 2 A, Chemin du Pré Carré, 38240 Meylan, France is listed. Figures such as max input voltage and nano-power claims are presented as design targets/silicon measurements from IP Catalog 2026 on the page.

Technical capabilities

  • Published as design IP

    Licensable semiconductor IP. This listing is not a finished controller chip.

  • Analog IP

    Analog or mixed-signal IP block.

  • Finder function

    PMIC building blocks

Lifecycle and categories

Solution categories
Power Management IP
Supported versions
LDO/DC-DC/SIMO/ABB/voltage monitors; nodes to 22 nm + FinFET portfolio stated
Compatibility
Battery/USB inputs up to 5.5 V stated; multi-node views per datasheet. Source

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Agile Analog agileLDO

Power Management IP

Agile Analog agileLDO is a linear low-dropout regulator, including capless and externally biased configurations. It is not a buck converter, a switching regulator, or a finished power-management IC. The process node and the load current need confirmation.

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Agile Analog agilePOK

Power Management IP

Agile Analog agilePOK monitors a supply against programmable upper and lower thresholds, with 16 trim steps on the reviewed page. Monitoring a supply does not regulate it and does not establish complete tamper prevention.

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Agile Analog agilePOR

Power Management IP

Agile Analog agilePOR is a power-on-reset circuit with programmable normal and low-power thresholds, delays, and hysteresis. It is not a voltage regulator.

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Agile Analog agileREF

Power Management IP

Agile Analog agileREF is a bandgap voltage reference with configurable bias outputs. It is not a clock generator and it is not a load regulator.

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Cologne Chip C3-PLL-2 ASIC IP Core

Power Management IP

Cologne Chip C3-PLL-2 is licensable ASIC PLL IP. The official site lists ASIC IP Cores C3-PLL-2 and C3-CODEC-G712-4 alongside GateMate FPGA and telecom IC product lines.

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Racyics ABX Adaptive Body Bias Platform (GF 22FDX)

Power Management IP

Racyics ABX is licensable Adaptive Body Biasing platform IP for GlobalFoundries 22FDX. The official product page states ULV operation down to 0.4 V with ABB generator, standard cells, and SRAM IP, including automotive RBB leakage reduction claims.

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