
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
Use this listing for the reset function at supply startup.
Agile Analog agilePOR is a power-on-reset circuit with programmable normal and low-power thresholds, delays, and hysteresis. It is not a voltage regulator.
Regulation is a separate function.
Configuration checks
Confirm the threshold, delay, and hysteresis for the process and supply you use. This circuit does not regulate the supply.
Recorded aliases
por; power on reset; reset supervisor; supply startup reset
Cologne Chip C3-PLL-2 is licensable ASIC PLL IP. The official site lists ASIC IP Cores C3-PLL-2 and C3-CODEC-G712-4 alongside GateMate FPGA and telecom IC product lines.
View solutionDolphin Semiconductor power management IP is a licensable platform of LDO, DC/DC, SIMO, ABB, and voltage-monitor blocks. The official page states nano-power designs across process nodes and a per-project licensing model.
View solutionRacyics ABX is licensable Adaptive Body Biasing platform IP for GlobalFoundries 22FDX. The official product page states ULV operation down to 0.4 V with ABB generator, standard cells, and SRAM IP, including automotive RBB leakage reduction claims.
View solutionAgile Analog agileLDO is a linear low-dropout regulator, including capless and externally biased configurations. It is not a buck converter, a switching regulator, or a finished power-management IC. The process node and the load current need confirmation.
View solutionAgile Analog agilePOK monitors a supply against programmable upper and lower thresholds, with 16 trim steps on the reviewed page. Monitoring a supply does not regulate it and does not establish complete tamper prevention.
View solutionAgile Analog agileREF is a bandgap voltage reference with configurable bias outputs. It is not a clock generator and it is not a load regulator.
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