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ShortLink Mixed-Signal RF / ADC Silicon IP

The ShortLink Silicon IP overview page reviewed on 12 November 2026 describes differentiated mixed-signal IP as a high-end extension for SoC teams, including roadmap-based ready-to-use IPs for mainstream processes: RF transceivers, ADCs (SAR and Delta-sigma), and other IPs (clocks, digital IF).

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Overview

ShortLink mixed-signal Silicon IP is a licensable RF/analog IP portfolio. The official Silicon IP overview lists RF transceivers, SAR/Delta-sigma ADCs, and clock/DC-DC building blocks as standard and purpose-specific licensed IP.

Purpose-specific IPs born from silicon-proven ASIC designs (RF, clocks, ADCs, LDOs, DC/DCs) are licensed through various models including white-box. The company emphasizes ultra-low-power, high accuracy/sensitivity, compact area, and collaborative delivery with PDK/EDA views and documentation. Confirm the exact revision, role, and deliverables on the current provider page before integration.

Technical capabilities

  • Published as design IP

    Licensable semiconductor IP. This listing is not a finished controller chip.

  • Finder function

    RF transceiver / ADC

  • Recorded aliases

    ShortLink Silicon IP; ShortLink RF IP

Lifecycle and categories

Solution categories
Power Management IP
Compatibility
Confirm configuration, process support, and companion IP with the provider. Companion PHY or controller products are separate listings unless the reviewed page states a bundle. Source

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