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TTTECH FRS HSR/PRP Ethernet Switch IP

The HSR/PRP solutions for FPGAs page reviewed on 12 November 2026 details the FRS IP Solution as an FPGA IP core integrating High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) into an Ethernet Layer-2 switch.

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Overview

Stated features include configurable 3- to 8-port operation; all ports triple-speed 10/100/1000 Mbit/s; internal wire-speed gigabit full-duplex forwarding; IEC 62439-3 Clause 5 HSR (v4.0) and Clause 4 PRP compatibility; IEEE 1588-2008 PTPv2 support including end-to-end one-step and peer-to-peer transparent clock functions; cut-through and store-and-forward; HSR RedBox/End-node/QuadBox and PRP RedBox/DANP modes; IEEE 802.1D MAC bridge compatibility; MII/GMII interfaces with adapters for RMII/RGMII/EMAC/triple-mode; packet filter/prioritization; and a register interface. Optional XR7 Redundancy Supervision C source software for Linux (portable) is described. Use cases named include substation automation, industrial automation, and transportation. An FRS IP Solution flyer PDF is linked from the page. Official page provides datasheet-grade FRS Ethernet switch IP feature list.

Technical capabilities

  • Published as design IP

    Licensable semiconductor IP. This listing is not a finished controller chip.

  • Controller IP

    Controller / protocol IP. A companion PHY is a separate listing unless the page states otherwise.

  • Numbered specification: IEEE 1588-2008 PTPv2

    IEEE 1588-2008 PTPv2 is named for this product on the reviewed page.

  • Recorded aliases

    FRS IP Solution; TTTECH FRS; Flexibilis FRS

Lifecycle and categories

Solution categories
Ethernet IP
Supported versions
IEC 62439-3 HSR v4.0 / PRP; IEEE 1588-2008 PTPv2; 10/100/1000 Mbit/s ports
Compatibility
FPGA IP; MII/GMII and adapter options; optional XR7 supervision software. Source

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