Cadence Modus DFT
DFTCadence Modus is design-for-test software for scan, compression, memory BIST, logic BIST, ATPG, and diagnostics. It is an EDA tool, not automated test equipment.
View solutionImplementation & Signoff
Scan, BIST, and other design-for-test insertion. This is the tool or IP for test structures, not the manufacturing test service.

Cadence Modus is design-for-test software for scan, compression, memory BIST, logic BIST, ATPG, and diagnostics. It is an EDA tool, not automated test equipment.
View solutionSynopsys TestMAX is a design-for-test family covering testability analysis, ATPG compression, logic BIST, memory self-test and repair, and analog fault simulation. It is an EDA tool, not automated test equipment.
View solutionExplore more
Search across providers and capabilities to discover more solutions for your SoC.