Packaging and chiplets

2.5D/3D integration, advanced packaging, substrates and interposers.

SearchProviderSolution typeCapability

Showing 13 of 13 published solutions.

AMD 3D V-Cache

3D V-Cache stacks an L3 cache tile on a CPU core-complex die using copper-to-copper hybrid bonding and TSVs. Official AMD materials call it the first x86 true 3D die stack, with much higher interconnect density versus 2D chiplets.

Advanced Micro DevicesUnited StatesView Technology

Providers

Companies shown here publish a technology mapped to this page. Contact is for general enquiries, not a compatibility claim.

Contact

Reports

Events

No source-backed event is linked here.

Webinars

No published webinar is linked here.

Advanced Packaging

APTURA Thermo-Compression Bonding

Kulicke & Soffa APTURA is a thermo-compression bonder for advanced packaging, not a wire bonder catalog and not OSAT assembly.

Kulicke & Soffa IndustriesSingaporeView Technology

Advanced Packaging

Datacon 8800 CHAMEO Hybrid Bonding

Besi Datacon 8800 CHAMEO is a hybrid-bonding die-attach platform for copper-to-copper and related advanced-package construction.

BE Semiconductor IndustriesNetherlandsView Technology

Advanced Packaging

Dual TC Bonder

HANMI Dual TC Bonder is a thermocompression bonding platform for HBM die stacking.

HANMI SemiconductorSouth KoreaView Technology

Advanced Packaging

Embedded Power Platform (EPP)

onsemi Embedded Power Platform (EPP) is a newly introduced wafer-level power-device integration architecture that uses the silicon wafer as the package. Sampling is expected in 2026 with strategic customers.

onsemiUnited StatesView Technology

Advanced Packaging

Intel EMIB Advanced Packaging

Intel EMIB is a 2.5D packaging technology that embeds a silicon interconnect bridge in the package substrate to connect neighboring dies without a full-size interposer.

Intel CorporationUnited StatesView Technology

Advanced Packaging

Intel Foveros

Intel Foundry 3D stacking and 2.5D chiplet packaging family, including hybrid-bonding options described as Foveros Direct 3D. EMIB is a separate 2.5D bridge platform.

Intel CorporationUnited StatesView Technology

Advanced Packaging

SWIFT High-Density Fan-Out

Amkor SWIFT is a high-density fan-out packaging platform for fine-pitch RDL and multi-die construction.

Amkor TechnologyUnited StatesView Technology

Advanced Packaging

TSMC 3DFabric

TSMC umbrella family of 3D silicon stacking and advanced packaging. CoWoS, TSMC-SoIC and InFO are constituent platforms listed separately.

TSMCTaiwanView Technology

Advanced Packaging

TSMC CoWoS Advanced Packaging

TSMC CoWoS is a 2.5D advanced packaging platform that integrates logic dies and high-bandwidth memory on an interposer for high-performance computing and AI systems.

TSMCTaiwanView Technology

Advanced Packaging

TSMC InFO Advanced Packaging

TSMC InFO is a wafer-level integrated fan-out packaging platform using high-density redistribution layers for mobile, network and high-performance computing integration.

TSMCTaiwanView Technology

Advanced Packaging

TSMC SoIC 3D Integration

TSMC-SoIC is a wafer-level frontend 3D chip-stacking platform for homogeneous and heterogeneous chiplets, distinct from CoWoS 2.5D packaging and InFO fan-out.

TSMCTaiwanView Technology

Advanced Packaging

VIPack

ASE VIPack is ASE’s heterogeneous-integration packaging platform for high-density chiplet and advanced-package construction.

ASE Technology HoldingTaiwanView Technology

Scheduled maintenance

We’ll be back soon

Silicon Showcase is temporarily unavailable while we complete scheduled maintenance.