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Synopsys Multi-Protocol 10G PHY IP

The provider page describes a multi-protocol SerDes PHY and states a serial lane-rate range of 1.25 to 10.

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Overview

PCIe 3.1, SATA 6G, and SGMII are listed. Companion digital controllers are separate products. A lane rate does not establish an Ethernet line rate, and the page does not establish copper BASE-T Ethernet PHY support. Silicon Showcase⁠™ reviewed the page on 2 November 2026. Pricing, license terms, process support, and the exact configuration available for a design are not stated on the reviewed page and require confirmation from the provider.

Technical capabilities

  • Published as design IP

    Licensable SerDes PHY design IP.

  • Finder function

    SerDes PHY

Lifecycle and categories

Solution categories
SerDes IP
Compatibility
Pricing, licensing, and configuration availability require provider confirmation. Source

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