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Synthesis and DFT

Logic synthesis, scan insertion, BIST and testability tools.

Showing 1–4 of 4 solutions.

Provider
  • Cadence Modus DFTCadence Design Systems logo

    DFT

    Cadence Modus is design-for-test software for scan, compression, memory BIST, logic BIST, ATPG, and diagnostics. It is an EDA tool, not automated test equipment.

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  • Synopsys Fusion CompilerSynopsys logo

    Physical Design

    Synopsys Fusion Compiler is an RTL-to-GDSII implementation system with one data model and built-in signoff timing, extraction, and power analysis. It is an EDA tool, not a foundry process.

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  • Synopsys TestMAXSynopsys logo

    DFT

    Synopsys TestMAX is a design-for-test family covering testability analysis, ATPG compression, logic BIST, memory self-test and repair, and analog fault simulation. It is an EDA tool, not automated test equipment.

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