
NOV172026
Conference
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The Genus page describes logic and physical synthesis for multi-million-instance designs and says it shares a database and analytical engine with the Innovus Implementation System.
Cadence states synthesis speedup of up to 5X. That figure is provider-stated and was not remeasured. The page does not list a foundry process for the tool. A customer story about an Intel process is not recorded as a Genus process certification.
Logic and physical synthesis
RTL synthesis with physical awareness, as described on the Genus page.

