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Soft Mixed Signal USB 2.0 PHY IP

The Soft Mixed Signal USB 2.0 PHY product page reviewed on 12 November 2026 describes a complete USB 2.0 PHY transceiver with optional IP blocks fully integrated.

Solution category: USB IP
Offering type: Product

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Overview

Stated features include compliance with the USB 2.0 specification; integrated Host/Device/OTG transceiver when optional features are included; clock recovery from 480 Mbps data; high-frequency PLL; HS/FS modes (and LS with OHCI in host mode); UTMI and/or UTMI+ with 8- or 16-bit bi-/uni-directional data buses; calibrated pull-up/pull-down and termination resistors; and optional charge pump plus VBUS comparators for OTG SRP/HNP. The page positions the PHY as isolating ASIC vendors from high-speed analog transceiver design risk. Confirm the exact revision, role, and deliverables on the current provider page before integration.

Technical capabilities

Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
PHY IP
Physical-layer IP. Controllers are separate listings unless the page states a bundle.
Finder function
USB 2.0 PHY
Numbered specification: UTMI / UTMI+ Level 3
UTMI / UTMI+ Level 3 is named for this product on the reviewed page.
Recorded aliases
SMS USB 2.0 PHY; Soft Mixed Signal USB PHY

Lifecycle and categories

Lifecycle stages: Interface and connectivity IP
Solution categories: USB IP
Supported versions: USB 2.0 HS/FS/LS; UTMI / UTMI+ Level 3
Compatibility: Confirm configuration, process support, and companion IP with the provider. Companion PHY or controller products are separate listings unless the reviewed page states a bundle. Source