
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The Semiconductor IP page reviewed on 12 November 2026 states Faststream licenses semiconductor IP cores for digital, analog and mixed-signal integration with verification collateral and integration support.
The official Semiconductor IP page lists USB, PTP, AXI-oriented, DSP, SERDES and related cores with licence/delivery process.
The core catalogue table includes AXI USB 2.0 Device IP (USB 2.0 device controller with AXI interface), Precision Time Protocol IP (IEEE 1588 including automotive Ethernet variant), Analog Data Acquisition Controller IP, Multi-Protocol Synchronous Serial Engine IP, 18-bit Pipeline DSP Slice IP, ADC IP, SERDES, PVT sensors, ultra-low-jitter clocking, memory interfaces and I/O, a posit-based processor, Ethernet CAN-to-ALDL bridge, Ethernet PID-control filters, and Verification IP. Maturity is stated to vary (silicon-proven, FPGA-validated, or RTL) and confirmed at enquiry. Licence flow covers requirements/fit, configuration, delivery with documentation and verification collateral, integration support, and lifecycle updates. The catalogue is also published on Design & Reuse.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
Controller IP
Controller / protocol IP. A companion PHY is a separate listing unless the page states otherwise.
Finder function
USB 2.0 device controller
Numbered specification: USB 2.0 Device (AXI)
USB 2.0 Device (AXI) is named for this product on the reviewed page.
Numbered specification: catalogue also lists IEEE 1588 PTP and other cores
catalogue also lists IEEE 1588 PTP and other cores is named for this product on the reviewed page.
Cadence USB 3.0 xHCI Host Controller IP is a USB host controller. The brochure states SuperSpeed at 5 Gbps, High-Speed at 480 Mbps, Full-Speed at 12 Mbps, and Low-Speed at 1.5 Mbps, with a separate PHY. It does not state a faster SuperSpeed host rate, USB Type-C, or USB Power Delivery. A device-only USB controller is a different role.
View solutionCanova Tech USB and Power Delivery IP is a family of licensable USB2/eUSB/USB-PD mixed-signal IP. The official page names CT25201 USB 2.0 transceiver, CT20603 eUSB2 repeater, and CT20601/CT20602 USB-C/PD PHY solutions.
View solutionCorigine USB 3.2 Controller IP is licensable USB controller IP for ASIC and FPGA. The official USB IP page states USB-IF certified controllers for USB 3.2 Gen1/Gen2 and USB 2.0 with Host, Device, and DRD configurations.
View solutionDesign Gateway USB3.0-IP is licensable USB 3.0 host or device controller soft IP for AMD FPGAs. The official page states USB 3.0 Revision 1.0 compliance for link and protocol layers with PIPE PHY interface.
View solutionSoft Mixed Signal USB 2.0 PHY is licensable PHY transceiver IP. The official product page states a fully integrated Host/Device/OTG transceiver compliant with USB 2.0 and UTMI/UTMI+ interfaces.
View solutionLicensable design IP. USB 3.2 controller with documented device support. Host and dual-role support are not documented.
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