
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The Products page reviewed on 12 November 2026 describes NuLink as the building block for Eliyan D2D and D2M PHY IP cores and NuLink-X for C2C IP cores, for integration into ASIC designs.
Eliyan NuLink PHY is licensable die-to-die and chip-to-chip interconnect PHY IP.
For standard packaging, NuLink-SP PHYs target organic/laminate packages with 100–130 µm bump pitch and industry standards including UCIe and BoW, plus UMI and SBD variants; a metrics table lists example NuLink UCIe unidirectional configurations at 32 or 64 Gbps/lane on 5/3/2 nm process nodes with 32 Tx+32 Rx lanes. For advanced packaging, NuLink-AP PHYs target 40–55 µm bump pitch interposers/bridges with UCIe and SBD options and example 40 Gbps/lane UCIe unidirectional metrics. NuLink-XS C2C PHYs for longer-reach PCB connections are also tabulated. NuLight optical chiplet products are separate finished chiplet offerings on the same page and are not this PHY listing. Official page clearly positions NuLink as PHY IP cores; NuLight chiplets excluded from this listing.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
PHY IP
Physical-layer IP. Controllers are separate listings unless the page states a bundle.
Finder function
UCIe/BoW die-to-die PHY
Numbered specification: example rates up to 64 Gbps/lane in tables
example rates up to 64 Gbps/lane in tables is named for this product on the reviewed page.
Recorded aliases
NuLink; NuLink-SP; Eliyan UCIe PHY
Cadence UCIe PHY is design IP for the die-to-die physical layer. Cadence states up to 32 Gbps per pin, including 4, 8, 12, 16, and 24 Gbps. The page does not name a UCIe revision.
View solutionSynopsys UCIe PHY IP is DesignWare die-to-die PHY IP. Synopsys states up to 64 Gb/s and 21 Tbps/mm, and compliance with the latest UCIe specification, without naming the revision.
View solutionCadence UCIe Controller is design IP for the die-to-die adapter and protocol layers. The controller description does not state a data rate or a numbered UCIe revision.
View solutionSynopsys UCIe Controller IP is DesignWare die-to-die controller IP for the adapter and protocol layers. The provider page does not state a data rate or a numbered UCIe revision.
View solutionPortfolio listing: Synopsys UCIe IP is the combined controller, PHY, and verification IP solution. It is not a separate controller or PHY. The solution page does not name a numbered UCIe revision, and a data rate on the PHY page is not a rate for this portfolio or for every process and configuration.
View solution
