Find SoC solutions, providers and technical resources.
28 providers for “packaging”
Packaging
AMD 3D V-Cache is a publicly named 3D packaging technology that stacks an L3 cache tile on a CPU core-complex die. Official AMD product-brief materials describe copper-to-copper hy…
Physical Design
…hysical-design methodology for 2nm compute dies and chiplet packaging, not a foundry process node.
Packaging
Amkor SWIFT is a high-density fan-out packaging platform for fine-pitch RDL and multi-die construction.
Design Resources
SoC integration software for IP-XACT packaging, connectivity, and register generation.
Packaging
ASE VIPack is ASE’s heterogeneous-integration packaging platform for high-density chiplet and advanced-package construction.
Packaging
AT&S high-performance IC substrates are build-up package substrates that connect advanced processors to system boards, not generic PCBs and not OSAT assembly.
Packaging
…es present Datacon equipment for hybrid bonding in advanced packaging. This listing records the hybrid-bonding platform rather than every Besi die-attach tool. Process options shou…
Packaging and chiplets
Fully automated 310 × 310 mm panel-level packaging system from ERS electronic that integrates temporary carrier bonding, debonding and detaping. The first unit has been delivered t…
Design Services
GUC APT is a 2.5D/3D multi-die ASIC packaging-design platform, not a foundry process node and not OSAT assembly.
Packaging
HANMI Dual TC Bonder is a thermocompression bonding platform for HBM die stacking.
Packaging
Intel EMIB is a 2.5D packaging technology that embeds a silicon interconnect bridge in the package substrate to connect neighboring dies without a full-size interposer.
Packaging
…& Soffa APTURA is a thermo-compression bonder for advanced packaging, not a wire bonder catalog and not OSAT assembly.
