Discover 169 technologies from leading innovators around the world.
Marvell’s coherent DSP family is the silicon that encodes and decodes coherent optical wavelengths for long-haul, metro and data-center interconnect. Official product pages describe coherent DSPs as a core Marvell optical connectivity franchise.
Data CenterTelecommunicationsView Technology
Blackwell is NVIDIA’s current data-center GPU architecture, built as a dual-die GPU with a 10 TB/s chip-to-chip interconnect. Official materials describe a two-reticle design manufactured on TSMC 4NP.
AI & HPCData CenterView Technology
BlueField is NVIDIA’s data processing unit: Arm cores, high-speed Ethernet/InfiniBand and hardware accelerators for networking, storage and security offload, isolated from the host CPU.
AI & HPCData Center+1View Technology
Oryon is Qualcomm’s custom 64-bit CPU microarchitecture, including cache hierarchy, branch prediction, prefetch and later Flex Cache, designed in-house and scaled across Snapdragon platforms.
AutomotiveAI & HPC+2View Technology
SK hynix HBM4 doubles I/O to 2,048 terminals, claims >10 Gbps and more than 40% better power efficiency versus the prior generation, and uses Advanced MR-MUF to stack DRAM with warpage control and heat dissipation.
AI & HPCData CenterView Technology
Samsung’s 3 nm foundry node introduced Gate-All-Around transistors as Multi-Bridge-Channel FETs (MBCFET): stacked nanosheet channels with the gate on all four sides, replacing FinFET for better electrostatic control.
AutomotiveAI & HPC+2View Technology
Samsung HBM4 is the company’s current high-bandwidth DRAM stack for AI accelerators, with an advanced base die and stacked DRAM cubes. Samsung’s official HBM family page covers HBM3E through HBM4/HBM4E as the AI-memory roadmap.
AI & HPCData CenterView Technology
Samsung V10 BV-NAND is bonded vertical NAND with more than 400 word lines, brought to mass-production readiness for AI storage.
AI & HPCData Center+1View Technology
TPU7x (Ironwood) is Google Cloud's seventh-generation TPU, built for large-scale training and inference.
AI & HPCData CenterView Technology
Micron DDR DRAM is a synchronous DRAM component family spanning successive double-data-rate generations for data-center, industrial and automotive designs.
AutomotiveData Center+1View Technology
Micron 3D NAND is a vertically stacked NAND flash technology family used as the semiconductor storage building block in data-center, client, mobile and automotive designs.
AutomotiveAI & HPC+2View Technology
Micron LPDDR is a low-power DRAM family for mobile, client, automotive and data-center designs that need high bandwidth at reduced power. LPDDR generations remain one technology line.
AutomotiveAI & HPC+2View Technology
Lam Research SABRE is an electrochemical copper-deposition platform for damascene interconnect, including logic, memory and high-bandwidth memory wiring. Distinct from Lam’s broader etch category.
AI & HPCData CenterView Technology
Synopsys HBM interface IP is a high-bandwidth memory interface family including controller, PHY and verification IP for AI and high-performance computing SoCs. Distinct from UCIe die-to-die IP.
AI & HPCData CenterView Technology
Infineon OptiMOS is a low- and mid-voltage trench silicon MOSFET technology family for high-frequency power conversion. Distinct from CoolMOS, CoolSiC and CoolGaN.
AutomotiveData Center+2View Technology
KLA overlay and dimensional metrology systems measure layer-to-layer alignment, critical dimensions and related pattern geometry. Distinct from defect inspection and review.
AutomotiveData Center+1View Technology
Applied Materials Endura is an ultra-high-vacuum metallization platform used for physical vapor deposition and integrated multi-chamber sequences. Distinct from the Vistara wafer-manufacturing chassis.
AI & HPCData CenterView Technology
NVIDIA NVLink is a high-bandwidth GPU-to-GPU interconnect and rack-scale fabric for AI training and inference. Distinct from NVLink-C2C chip-to-chip packaging links.
AI & HPCData CenterView Technology
Infineon CoolMOS is a high-voltage silicon superjunction MOSFET technology family for offline and high-voltage power conversion, distinct from CoolSiC, CoolGaN and OptiMOS.
Data CenterIndustrial+2View Technology
Intel EMIB is a 2.5D packaging technology that embeds a silicon interconnect bridge in the package substrate to connect neighboring dies without a full-size interposer.
AI & HPCData CenterView Technology
TSMC-SoIC is a wafer-level frontend 3D chip-stacking platform for homogeneous and heterogeneous chiplets, distinct from CoWoS 2.5D packaging and InFO fan-out.
AI & HPCData CenterView Technology
TSMC CoWoS is a 2.5D advanced packaging platform that integrates logic dies and high-bandwidth memory on an interposer for high-performance computing and AI systems.
AI & HPCData CenterView Technology
FermionIC publishes multi-protocol SERDES semiconductor IP for high-speed chip-to-chip and system connectivity across advanced digital interfaces.
AI & HPCData Center+1View Technology
Lightmatter Passage is a photonic interconnect platform using integrated photonics and three-dimensional connectivity approaches to scale high-bandwidth communication across advanced AI and computing systems.
AI & HPCData CenterView Technology
