
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The Semiconductor IP page reviewed on 12 November 2026 presents RF, mmWave, analog, mixed-signal and power semiconductor IP with silicon-proven options, configurable IP, and engineering support.
CoreHW Semiconductor IP is a licensable RF/mmWave/analog/power portfolio including radar transceiver IP, PLLs/VCOs, data converters, and PMIC blocks.
Building-block categories include mmWave/radar IP (chirp/clock PLLs, multipliers, PAs, LNAs, mixers, IF, data converters for 76–81 GHz FMCW); RF front ends for Wi-Fi/cellular/Bluetooth/GNSS; PLLs/VCOs/clocking; power management (buck, LDO, bandgaps); data converters and sensor interfaces; and reusable analog blocks. Featured items include 81 GHz radar transceiver IP and 80 GHz mmWave PLL on GlobalFoundries 22FDX, radiation-hardened CoreVCO SiGe (IC and silicon IP), power-management bucks/LDOs, ADC/DAC IP across GF/TSMC/X-FAB, and CorePLL dual wideband synthesizer IP (1.333–8 GHz). A catalogue table lists named parts such as Core5ADCDCTS180, CoreADC12b650MGF22, and multiple SAR ADCs. Flexible delivery covers standard IP licensing, customization, subsystem integration, and implementation support; maturity may be Silicon Proven, Pre-silicon, or Planned per inquiry. FAQ states not every IP is silicon proven and confirms black-box or white-box delivery depending on license.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
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RF / mmWave / analog IP portfolio
Numbered specification: Portfolio spans ~DC–81 GHz radar/RF
Portfolio spans ~DC–81 GHz radar/RF is named for this product on the reviewed page.
Numbered specification: specific SKUs as catalogued (GF 22FDX, TSMC, X-FAB, ST, etc.)
specific SKUs as catalogued (GF 22FDX, TSMC, X-FAB, ST, etc.) is named for this product on the reviewed page.
Agile Analog agileADC 12 is a 12-bit charge-redistribution SAR ADC with a stated sample rate up to 30 MSPS and a 16-channel input multiplexor for buffered or unbuffered, differential or single-ended inputs. The foundry node and the combined resolution, rate, and ENOB need confirmation. It is not a MIPI CSI-2 camera interface.
View solutionAgile Analog agileDAC 12 is a segmented current-steering DAC with a nominal 12-bit resolution and a stated rate up to 20 MSPS, in single-ended or differential form. It converts digital codes to an analog output. It is not an ADC. The process node and the operating point need confirmation.
View solutionAgile Analog agileSensorIF is an analog sensor acquisition subsystem that combines a configurable ADC, DAC, comparator, and reference. The subsystem page states a headline rate up to 64 MSPS. That headline is not the sample rate of the standalone agileADC 12, and the independent maxima are not one simultaneous operating point. It is not a MIPI CSI-2 camera interface.
View solutionAlphacore offers licensable high-speed low-power ADC, DAC, PLL, I/O transceiver, and SerDes PHY IP cores. The official products page publishes part-numbered tables with process nodes, rates, and product-brief downloads, stating licenses are available for validated cores.
View solutionChipus publishes a licensable analog/mixed-signal IP portfolio spanning power management, SAR ADC/DAC, oscillators, sensors, and RF front-ends with silicon-proven and GDS-available statuses across multiple foundries. The listed chipus.com/ip path failed/parked; this listing uses the official chipus-ip.com.br portfolio mirror.
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