
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
Reviewed candidate URL https://chipus.com/ip/ on 12 November 2026; fetches returned empty/park-style failure, consistent with known lander redirect issues on chipus.com.
The listed chipus.com/ip path failed/parked; this listing uses the official chipus-ip.com.br portfolio mirror.
Families include Power Management (current/voltage references, LDO, PMU, POR, Li-Ion chargers, buck/boost converters), Data Converters (8-bit and 10-bit SAR ADCs, 8-bit time-based ADC, 11-bit 2 MSPS SAR ADC/DAC subsystem, 10-bit DAC), Clock Management oscillators (including flexible 200 kHz–20 MHz and RTC oscillators), Sensors & Actuators (capacitive/touch/temperature sensors, power driver), Analog & RF Front-Ends (UHF passive RFID AFE), and an LPDDR PHY row. Foundries/nodes in the table include SilTerra 0.18 µm, TowerJazz 0.18 µm, XFAB 0.35 µm, TSMC 0.18/0.04/0.13 µm, LFoundry/SMIC 0.15 µm, AMS 0.35 µm, GlobalFoundries 0.022/0.13 µm, UMC 0.25 µm, and Dongbu. Statuses include Silicon Proven, Silicon Available, GDS Available, and Under development. Contact lists Florianópolis, SC, Brazil. Candidate title Analog Mixed-Signal IP is represented by this portfolio rather than a single SKU. chipus.com/ip failed; alternate official chipus-ip.com.br portfolio confirms licensable AMS IP catalog.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
Finder function
Analog / mixed-signal IP portfolio
Numbered specification: Portfolio SKUs as tabulated (e.g., CM2013ae 10-bit SAR ADC
Portfolio SKUs as tabulated (e.g., CM2013ae 10-bit SAR ADC is named for this product on the reviewed page.
Numbered specification: CM2311de 11-bit ADC/DAC
CM2311de 11-bit ADC/DAC is named for this product on the reviewed page.
Numbered specification: multiple PMU/LDO/oscillator parts)
multiple PMU/LDO/oscillator parts) is named for this product on the reviewed page.
Agile Analog agileADC 12 is a 12-bit charge-redistribution SAR ADC with a stated sample rate up to 30 MSPS and a 16-channel input multiplexor for buffered or unbuffered, differential or single-ended inputs. The foundry node and the combined resolution, rate, and ENOB need confirmation. It is not a MIPI CSI-2 camera interface.
View solutionAgile Analog agileDAC 12 is a segmented current-steering DAC with a nominal 12-bit resolution and a stated rate up to 20 MSPS, in single-ended or differential form. It converts digital codes to an analog output. It is not an ADC. The process node and the operating point need confirmation.
View solutionAgile Analog agileSensorIF is an analog sensor acquisition subsystem that combines a configurable ADC, DAC, comparator, and reference. The subsystem page states a headline rate up to 64 MSPS. That headline is not the sample rate of the standalone agileADC 12, and the independent maxima are not one simultaneous operating point. It is not a MIPI CSI-2 camera interface.
View solutionAlphacore offers licensable high-speed low-power ADC, DAC, PLL, I/O transceiver, and SerDes PHY IP cores. The official products page publishes part-numbered tables with process nodes, rates, and product-brief downloads, stating licenses are available for validated cores.
View solutionCoreHW Semiconductor IP is a licensable RF/mmWave/analog/power portfolio including radar transceiver IP, PLLs/VCOs, data converters, and PMIC blocks. The official IP page states standard licensing, customization, and subsystem integration with black-box or white-box delivery.
View solution
