
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
Use this listing when the request is for an integrated analog sensor acquisition subsystem.
Agile Analog agileSensorIF is an analog sensor acquisition subsystem that combines a configurable ADC, DAC, comparator, and reference. The subsystem page states a headline rate up to 64 MSPS. That headline is not the sample rate of the standalone agileADC 12, and the independent maxima are not one simultaneous operating point. It is not a MIPI CSI-2 camera interface.
It does not replace the standalone ADC or DAC, and it does not replace a digital camera interface.
Finder function
Analog sensor subsystem
Configuration checks
Independent maxima are not one operating point. Confirm the foundry node and which blocks are licensed together.
Recorded aliases
analog sensor interface; sensor afe; sensor acquisition subsystem; agilesensorif
Alphacore offers licensable high-speed low-power ADC, DAC, PLL, I/O transceiver, and SerDes PHY IP cores. The official products page publishes part-numbered tables with process nodes, rates, and product-brief downloads, stating licenses are available for validated cores.
View solutionChipus publishes a licensable analog/mixed-signal IP portfolio spanning power management, SAR ADC/DAC, oscillators, sensors, and RF front-ends with silicon-proven and GDS-available statuses across multiple foundries. The listed chipus.com/ip path failed/parked; this listing uses the official chipus-ip.com.br portfolio mirror.
View solutionCoreHW Semiconductor IP is a licensable RF/mmWave/analog/power portfolio including radar transceiver IP, PLLs/VCOs, data converters, and PMIC blocks. The official IP page states standard licensing, customization, and subsystem integration with black-box or white-box delivery.
View solutionAgile Analog agileADC 12 is a 12-bit charge-redistribution SAR ADC with a stated sample rate up to 30 MSPS and a 16-channel input multiplexor for buffered or unbuffered, differential or single-ended inputs. The foundry node and the combined resolution, rate, and ENOB need confirmation. It is not a MIPI CSI-2 camera interface.
View solutionAgile Analog agileDAC 12 is a segmented current-steering DAC with a nominal 12-bit resolution and a stated rate up to 20 MSPS, in single-ended or differential form. It converts digital codes to an analog output. It is not an ADC. The process node and the operating point need confirmation.
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