
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The Soft IP page reviewed on 12 November 2026 describes Menta eFPGA IP cores tailored to application resource needs, available as Soft RTL or Hard GDSII, with standard-cell-based rapid porting including industrial and rad-hard grades.
Menta eFPGA Soft IP is licensable embedded FPGA IP delivered as Soft RTL or Hard GDSII. The official Soft IP page states 100% standard-cell-based portability with silicon-proven results across many foundry nodes.
Stated benefits include field-upgrade IP protection, onboard-FPGA cost reduction up to 85%, on-chip accelerator bandwidth/latency, lower power versus COT FPGA (algorithms consuming 10–50% of discrete FPGA power), and Synopsys-based SoC EDA flow portability in weeks. Unique-features text states silicon-proven results from 350 nm to 5 nm or less, with manufactured examples on GLOBALFOUNDRIES 22FDX/12LP, Intel 16, Skywater RH90, STM130/65, TSMC 28HPC+/12FFC, XFAB 180 nm; qualification on GF 32 SOI and 12LP; customer designs on Intel 18A and TSMC N7 noted. Address Sophia Antipolis Les Drakkar, 2405 route des Dolines 06560 Valbonne, France is listed.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
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eFPGA soft/hard IP
Numbered specification: Soft RTL or Hard GDSII eFPGA
Soft RTL or Hard GDSII eFPGA is named for this product on the reviewed page.
ADICSYS eFPGA Soft IP is licensable standard-cell-based embedded FPGA IP. The official home page states the company designs and licenses soft eFPGA IP for ASICs and SoCs with technology-independent RTL-flow integration.
View solutionAchronix Speedcore is licensable embedded FPGA IP for ASICs and SoCs. The official product page states silicon-proven eFPGA technology with selectable logic, DSP/MLP and memory resources and Achronix Tool Suite programming.
View solutionQuickLogic describes customizable eFPGA hard IP, generated from standard-cell ASIC libraries for a chosen process and foundry, with LUT6, BRAM, and DSP resources set for the engagement.
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