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ADICSYS eFPGA Soft IP

The ADICSYS home page reviewed on 12 November 2026 states the company stands at the crossroads of ASIC design and FPGA, built on more than ten years of experience in custom FPGA and eFPGA projects.

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Overview

ADICSYS eFPGA Soft IP is licensable standard-cell-based embedded FPGA IP. The official home page states the company designs and licenses soft eFPGA IP for ASICs and SoCs with technology-independent RTL-flow integration.

An eFPGA IP section heading is present on the page. Deep per-SKU LUT/DSP/BRAM tables and foundry/node matrices are not enumerated on the reviewed home URL body. Official home explicitly states licensing of soft eFPGA IP; detailed SKU tables not on home body.

Technical capabilities

  • Published as design IP

    Licensable semiconductor IP. This listing is not a finished controller chip.

  • Finder function

    eFPGA soft IP

  • Numbered specification: Soft eFPGA (standard-cell based

    Soft eFPGA (standard-cell based is named for this product on the reviewed page.

  • Numbered specification: node-independent as stated)

    node-independent as stated) is named for this product on the reviewed page.

  • Recorded aliases

    ADICSYS eFPGA; ADICSYS soft eFPGA IP

Lifecycle and categories

Solution categories
eFPGA IP
Supported versions
Soft eFPGA (standard-cell based; node-independent as stated)
Compatibility
Technology-independent standard-cell soft IP for ASIC/SoC RTL flows stated. Source

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