Discover 169 technologies from leading innovators around the world.
DISCO DBG with DAF laser cut is a dicing-before-grinding process that laser-cuts die-attach film during wafer thinning.
Besi Datacon 8800 CHAMEO is a hybrid-bonding die-attach platform for copper-to-copper and related advanced-package construction.
HANMI Dual TC Bonder is a thermocompression bonding platform for HBM die stacking.
onsemi EliteSiC is the company’s silicon-carbide power-device platform for traction, industrial and energy conversion.
Hua Hong’s embedded memory process platform is a specialty foundry offering for embedded non-volatile memory on logic processes.
Astera Labs Intelligent Connectivity Platform is PCIe, CXL and Ethernet connectivity silicon for AI and data-center racks, not a compute accelerator architecture.
CXMT LPDDR6 is ChangXin Memory Technologies’ current low-power DRAM generation, described in official newsroom coverage of mass production for mobile and AI-adjacent platforms.
Lattice Nexus is a low-power FPGA platform architecture, not a data-center compute accelerator architecture.
Cambricon MLUarch03 is the company’s published AI processor architecture for machine-learning accelerators.
Analog Devices MxFE is a mixed-signal front-end platform that integrates high-speed converters and digital processing for RF sampling systems.
NAURA’s plasma etch platform is a wafer-fabrication etch tool family published on NAURA’s official product pages.
AMEC Primo is a plasma etch equipment platform published on AMEC’s official product pages.
Renesas R-Car is an automotive system-on-chip platform for ADAS, cockpit and vehicle compute, not a standalone data-center accelerator architecture.
Amkor SWIFT is a high-density fan-out packaging platform for fine-pitch RDL and multi-die construction.
Nanya’s second-generation 10nm-class DRAM is the company’s current DRAM process generation, described in official investor communications.
Tower Semiconductor SiGe BiCMOS is a specialty analog/RF foundry process combining silicon-germanium HBTs with CMOS.
Soitec Smart Cut is the engineered-substrate process used to transfer a thin crystalline silicon film onto an insulator, producing SOI wafers.
Advantest V93000 EXA Scale is a flagship SoC automatic test equipment platform for high-volume digital, mixed-signal and high-speed I/O devices.
ASE VIPack is ASE’s heterogeneous-integration packaging platform for high-density chiplet and advanced-package construction.
Cerebras Wafer-Scale Engine 3 is a wafer-scale AI processor: one chip occupying an entire 300mm wafer for large-model training and inference.
Nordic nRF54 is an ultra-low-power wireless IoT SoC platform, represented by the official nRF54H20 product family.
3D V-Cache stacks an L3 cache tile on a CPU core-complex die using copper-to-copper hybrid bonding and TSVs. Official AMD materials call it the first x86 true 3D die stack, with much higher interconnect density versus 2D chiplets.
Infinity Fabric is AMD’s coherent on-package and multi-die interconnect, linking CPU core-complex dies to a central I/O die and, in multi-socket systems, across packages. Official EPYC architecture documents describe CCD–IOD GMI links and xGMI.
Trainium is AWS’s custom machine-learning training silicon, built around NeuronCore and used in EC2 Trn instances. Official AWS silicon pages describe purpose-built ML chips as part of AWS custom silicon.
