Mi-V RV32 RISC-V Soft CPU

Mi-V RV32 is the RISC-V soft CPU Microchip recommends for new FPGA designs. The reviewed page lists it for PolarFire SoC, PolarFire, RTG4, SmartFusion 2, and IGLOO 2 FPGAs, with design support in Libero SoC Design Suite. Optional configuration includes compressed instructions, multiply/divide, single-precision floating point, debug, and ECC. It is processor IP for those FPGAs, not portable ASIC CPU IP, and it is not the hardened RISC-V cluster in a PolarFire SoC device.

CoreMark scores on that table run from 0.18 to 2.48 across configurations, so one score is not every build. Optional trace needs a separate trace-encoder IP core. The same page lists Mi-V RV32IMAF_L1_AHB, Mi-V RV32IMA_L1_AHB, and Mi-V RV32IMA_L1_AXI, and a migration guide toward Mi-V RV32. Operating-system support published for PolarFire SoC devices does not transfer to this soft CPU. The documentation index names a Mi-V_RV32 V3.1 user guide; that title is not recorded as a release version. Pricing, the licensed deliverable, and the enabled options need confirmation.