
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
The NPU page describes ENLIGHT Classic as 4/8-bit mixed-precision NPU IP for edge computing.
It is a 4/8-bit mixed-precision neural processing unit. ENLIGHT Pro is a separate listing.
It states convolution, pooling, and non-linear activation, a compiler that groups layers to reduce DRAM traffic, and 4-/8-bit mixed quantization. Hardware advantages name 4/8-bit computation, a DNN vector engine, and multi-core scale-out. The toolkit names ONNX (PyTorch), TF-Lite, and CFG (Darknet), with quantization from float to 4-/8-bit integer. Applications listed include person, vehicle, bike, and traffic-sign detection, parking-lot vehicle location, license-plate detection, and surveillance tracking. Deliverables are RTL for synthesis, software toolkits and a device driver, a user guide, and an integration guide. Figures stated only in the ENLIGHT Pro section are not repeated here. The Classic section does not name an operating system for its device driver. Use Classic only for the 4/8-bit product described on the NPU page. Specifications that appear only in the Pro section are not recorded for Classic. No process node or foundry is stated.
Published as design IP
Licensable semiconductor IP. This listing is not a finished controller chip.
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NPU
AONDevices AON1000 is licensable edge-AI IP for always-on voice/sound sensing. The official site lists AON1000/AON1010/AON1020/AONDenoise under Products IP alongside chip and platform offerings.
View solutionLicensable design IP. Embedded NPU for inference, including transformer workloads. It is not a CPU.
View solutionBrainChip Akida is licensable neuromorphic neural processor IP. The official IP page describes Akida 1, Akida Pico, and Akida 2 variants with event-based acceleration and IP brochure downloads.
View solutionCEVA-NeuPro-Nano is edge NPU processor IP, not a discrete accelerator chip and not a full SoC.
View solutionA published family of embedded AI processor IP for integration into chips.
View solutionEdgeCortix DNA-II is licensable neural network IP for ASIC, FPGA or SoC. The official DNA page describes run-time reconfigurable interconnects, scalable performance from 1K MACs, and MERA software co-optimization.
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