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EdgeCortix Dynamic Neural Accelerator II IP

The Dynamic Neural Accelerator II page reviewed on 12 November 2026 describes DNA-II as a neural network IP core pairable with any host processor, supporting convolutional and transformer networks for edge AI via run-time reconfigurable interconnects between compute elements.

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Overview

EdgeCortix DNA-II is licensable neural network IP for ASIC, FPGA or SoC.

It states scalable performance starting with 1K MACs for a wide range of SoC implementations. Architecture elements named include Standard Compute Engine (systolic arrays 3×3 to 64×64), Depthwise Compute Engine, and activation/scaling enhancements. DNA IP supports streaming (batch size = 1) and high-resolution data with scale-up/down for edge performance/power/size trade-offs. The MERA software stack optimizes computation order and resource allocation; DNA also powers the SAKURA-II AI Accelerator product. Japan HQ address KDX Musashi Kosugi Bldg 10F, Kawasaki-shi, Kanagawa is listed along with India/US/Singapore offices. A DNA-II product brief download is offered.

Technical capabilities

  • Published as design IP

    Licensable semiconductor IP. This listing is not a finished controller chip.

  • Finder function

    Neural network accelerator IP

  • Numbered specification: CNN and transformer support stated)

    CNN and transformer support stated) is named for this product on the reviewed page.

Lifecycle and categories

Solution categories
NPU IP
Supported versions
DNA-II (from 1K MACs; CNN and transformer support stated)
Compatibility
ASIC, FPGA or SoC; pairs with host processor; MERA compiler/framework stated. Source

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