Public source

Arteris CodaCache Last-Level Cache IP

CodaCache is a last-level cache.

Overview

Licensable standalone last-level cache IP for a non-coherent AXI4 interface. It is not a cache-coherent NoC, not a DDR controller, and not an OTP.

Coherency limits, size, and the separate memory controller need confirmation. It does not stand in for a coherent fabric or a DRAM controller.

Finder function
System cache
Numbered specification
AXI4
Configuration checks
Confirm the coherency limits and cache size. This is not a DDR controller, not an OTP, and not a UCIe PHY.
Recorded aliases
CodaCache

Lifecycle stages: Memory and subsystem IP
Solution categories: System Cache IP
Supported versions: AXI4
Compatibility: Pricing, licensing, and configuration availability require provider confirmation. Source

NOV172026

Conference

NOV192026

Workshop