
DVCon Europe 2026
- November 17 – 18, 2026
- Munich, Germany
- Organized by Accellera Systems Initiative
Public source
Treat this as a family.
Silicon Creations Ring PLL IP is a product family of general-purpose fractional-N and specialized ring PLLs. The family page does not state one frequency, jitter, or process that applies to every macro. It is not a PCIe controller.
An exact output frequency, jitter, and foundry node have to be confirmed for the macro you license.
Finder function
Ring PLL
Configuration checks
No family-wide frequency or jitter guarantee. Confirm the macro, process, and output requirement.
Recorded aliases
ring pll; fractional n pll; soc clock pll; clock synthesizer
Silicon Creations Free-Running Oscillator IP is a family of on-chip oscillators that need no external resonator. Trimming is available. The provider describes uses such as watchdog timers and MCU core clocks, and quotes best-case accuracy and period jitter that are not a guarantee for every macro. This is not a PLL and it is not crystal-grade accuracy.
View solutionSilicon Creations LC-PLL IP is a family of LC-tank PLLs aimed at low jitter for analog front ends, converters, PHYs, and RF. An example silicon result does not apply to every family member, and the family is not a serial protocol controller.
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