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United States|Santa Clara (HQ)
SiFive supplies RISC-V processor IP, including the Intelligence X200 series.
4 published solutions.
Licensable SiFive Performance P550 Gen 3 RISC-V CPU IP for new designs. The P500 page documents embedded Linux and RTOS readiness and the RVB23 profile. Vector is not documented for this core.
Licensable SiFive Performance P570 Gen 3 RISC-V application CPU IP. The P500 page documents RVA23, RVV 1.0, and Linux and Android readiness.
Licensable SiFive Performance P670 RISC-V vector application CPU IP. The P600 page documents a thirteen-stage, four-issue, out-of-order pipeline, RVA22, Vector 1.0, and Linux for these 64-bit application processors.
Licensable design IP. Linux-capable 64-bit RISC-V vector processor with RVV 1.0. It is not an NPU.