PIXEL DIE STACKED
Pixel die stacked on a logic die with Cu-Cu hybrid bonding

Pixel die stacked on a logic die with Cu-Cu hybrid bonding
Replaces TSV keep-out areas for denser sensor construction
Automotive · Industrial · Consumer Electronics · +1
Public source
Sony stacked CMOS image sensors are a publicly described sensor construction in which a pixel chip and a logic chip are joined with Cu-Cu (copper-copper) hybrid bonding.
Silicon Showcase illustrative visual
Illustrative representation based on publicly available technical information.
Sony’s stacked CMOS image sensor separates the pixel die from the logic die and joins them with Cu-Cu hybrid bonding, replacing TSVs. Official technology pages describe Cu-Cu as enabling denser, smaller, higher-function sensors.
Official Sony Semiconductor Solutions technology pages present Cu-Cu connection as replacing through-silicon via (TSV) keep-out areas so sensors can be smaller, denser and more functional. Sony describes Cu-Cu mass production from 2015; the method remains the current stacked-CIS manufacturing approach. This listing records the stacked CIS / Cu-Cu platform rather than individual IMX or LYTIA model numbers. Pregius global shutter and LOFIC pixel circuits remain related sensor technologies rather than separate rows in this expansion. Construction details should be confirmed on Sony’s current image-sensor technology pages.
Key characteristics associated with this technology.
Pixel die stacked on a logic die with Cu-Cu hybrid bonding
Replaces TSV keep-out areas for denser sensor construction
Platform for mobile, automotive, industrial and medical imaging
Not an IMX or LYTIA product-number catalog
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