VERTICALLY STACKED DRAM
Vertically stacked DRAM architecture
Vertically stacked DRAM architecture
High-bandwidth memory
AI & HPC · Data Center
Public source
Micron high-bandwidth memory is a publicly described stacked DRAM technology for high-performance computing.
Official technology image
Micron high-bandwidth memory technology uses vertically stacked DRAM dies and high-density interconnects to provide high memory bandwidth and power efficiency for AI and data-center computing platforms.
Official Micron pages present HBM as vertically stacked DRAM dies connected with high-density interconnects, including through-silicon vias, to increase memory bandwidth and improve power efficiency versus conventional DRAM in the same class of systems. Named generations including HBM3E and HBM4 remain successive implementations of this HBM family rather than separate listings. Micron positions the technology for AI and data-center computing platforms rather than as a consumer memory module. Product-generation names, capacity options and interface details should be taken from Micron's current HBM documentation.
Key characteristics associated with this technology.
Vertically stacked DRAM architecture
High-bandwidth memory
TSV-based die interconnect
HBM3E and HBM4 as generations of this family, not separate listings
AI and data-center memory applications
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