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54 results for Design & IP
eMemory NeoFuse is anti-fuse embedded OTP/PMTP silicon IP for logic process nodes, not a discrete memory product.
AutomotiveAI & HPCConsumer Electronics+1View Technology
Texas Instruments analog BCD (LBC) is TI’s bipolar-CMOS-DMOS process identity for foundational analog and power silicon, described in official TI manufacturing communications.
AutomotiveIndustrialConsumer Electronics+1View Technology
Lattice Nexus is a low-power FPGA platform architecture, not a data-center compute accelerator architecture.
AutomotiveIndustrialConsumer Electronics+1View Technology
Analog Devices MxFE is a mixed-signal front-end platform that integrates high-speed converters and digital processing for RF sampling systems.
IndustrialTelecommunicationsAerospace & DefenseView Technology
Renesas R-Car is an automotive system-on-chip platform for ADAS, cockpit and vehicle compute, not a standalone data-center accelerator architecture.
AutomotiveAI & HPCView Technology
S32 is NXP’s automotive processing platform: common architecture across vehicle network processors, zonal and real-time controllers, radar and central compute. Official pages emphasize Arm Cortex-A/R/M mix, ASIL D safety, hardware security and TSN Ethernet.
AutomotiveIndustrialView Technology
Microchip PolarFire SoC combines a coherent multi-core RISC-V CPU subsystem with PolarFire FPGA fabric on one device for Linux and real-time embedded systems.
IndustrialMedicalAerospace & Defense+1View Technology
Microchip PolarFire is a mid-range FPGA family providing programmable logic fabric, optional high-speed serial transceivers and on-chip interface IP for communications, imaging and embedded systems.
IndustrialMedicalTelecommunications+1View Technology
Synopsys HBM interface IP is a high-bandwidth memory interface family including controller, PHY and verification IP for AI and high-performance computing SoCs. Distinct from UCIe die-to-die IP.
AI & HPCData CenterView Technology
InCore publishes configurable RISC-V processor IP through an automated Core-hub generator that produces synthesizable core instances for custom semiconductor systems.
AI & HPCIndustrialIoTView Technology
Mindgrove Secure IoT is a RISC-V-based microcontroller/SoC family for connected and embedded devices, combining a processor core with peripherals, hardware crypto accelerators and on-chip secure memory.
IndustrialConsumer ElectronicsIoTView Technology
Arm Chiplet System Architecture provides standardized system partitioning and connectivity foundations for reusable chiplet-based designs. It is an architecture, not a processor-core catalog.
AutomotiveAI & HPCData CenterView Technology
